OpenRAM Layout verses Schematic (LVS) visualization
As part of the OpenRAM Layout verses Schematic (LVS) visualization my proposal under the mentorship of Jesse Cirimelli-Low and Matthew Guthaus aims to develop a comprehensive Python-based graphical user interface (GUI) with a robust backend system to effectively analyze, visualize, and debug layout versus schematic (LVS) mismatches in the OpenRAM framework. The proposed solution focuses on efficiently processing LVS report files in JSON format, identifying mismatched nets in the layout, and visually representing extra nets in the schematic graph using advanced backend algorithms. By implementing a powerful backend system, the GUI will streamline the debugging process and improve overall productivity, while maintaining high performance and reliability. The deliverables for this project include a fully-functional GUI with a performant backend, features for visualizing and navigating through LVS mismatches, comprehensive documentation, and user guides.
Mahnoor Ismail
Research Assistant
Mahnoor Ismail is a Software Engineer and Research Assistant at the Micro Electronics Research Lab (MERL-UIT). Her Research interests include exploring innovations in RISC-V domain, working with Emulation of Tiny ML Models on top of RV based SoCs, Formal Verification, Computer Architecture and Designing hardware using CHISEL HDl. As a Software Engineer her most keen interest is to engineer proper softwares especially for Electronics Design Automation, She has engineered an all in one Verification Suite for RISC-V based cores known as “Burq-Suite”.